1. Field of the Invention
The present invention generally relates to voltage generators, and more specifically, to a charge-pumping type voltage generator configured to reduce noise.
2. Description of the Prior Art
In conventional DRAMs, charges are pumped to generate a driving voltage for driving wordlines and bitlines without loss of threshold voltage. During DRAM operations, such as wordline-driving and bitline-precharging, a great amount of energy is consumed and then a level of the driving voltage becomes lower. In this case, the time when the level of the driving voltage becomes lower than a target level is detected in the conventional art to pump charges and maintain the level of the driving voltage.
FIG. 1 is a block diagram illustrating a conventional voltage generator. The conventional voltage generator comprises a detector 10, an oscillator 20, a control driver 30 and a pump 40. The detector 10 detects a level of a driving voltage Vpp. The oscillator 20 responds to an output signal from the detector 10. The control driver 30 responds to an output signal from the oscillator 20. The pump 40 pumps charge in response to an output signal from the control driver 30 to output the driving voltage Vpp.
FIGS. 2a and 2b are circuit diagrams illustrating the conventional voltage generator of FIG. 1. The detector 10 divides the driving voltage Vpp to obtain a detection voltage Vpps. Then, the detector 10 compares the detection voltage Vpps with a reference voltage Vrc to output a low level signal when the detection voltage is larger than the reference voltage Vrc, and vice versa. The detection voltage Vpps is represented by the following equation:
      V    pps    =                              R          3                +                  R          4                                      R          1                +                  R          2                +                  R          3                +                  R          4                      ×    Vpp  
When the output signal from the detector 10 is at the low level, that is, the detection voltage Vpps is smaller than the reference voltage Vrc, an oscillating signal is outputted from the oscillator. The control driver 30 outputs control signals p1, p2, g1 and g2 in response to the oscillating signal from the oscillator 20. The pump 40 outputs the driving voltage Vpp, controlled by the control signals p1, p2, g1 and g2 from the control driver 30. The capacitors C1 and C2 are precharged in response to the control signals p1 and p2. The driving voltage Vpp, which is larger than an externally applied voltage Vext, is generated by transmitting the charges stored in the capacitors C1 and C2 in response to the control signal g1 and g2.
FIG. 3 is a timing diagram illustrating the operation of the conventional voltage generator. When the wordline is activated or the bitline is precharged, the level of driving voltage Vpp starts to fall. At a time of t1, the detector 10 detects that the driving voltage Vpp falls below the target level. At a time of t2, the pump 40 starts to pump charge. The level of driving voltage Vpp rises because of the charge pumping operation of the pump 40. At a time of t3, the detector 10 detects the driving voltage Vpp at the target level, and commands the pump 40 to stop pumping charge. However, it is at a time of t4 that the actual pumping operation of the pump 40 stops due to the response time of the circuit.
As described above, in the conventional voltage generator, fluctuation ΔVpp of the driving voltage Vpp becomes large, due to the time delay between the point when the detector 10 actually detects the target level and the point when the pump 40 starts or stops operating, which results in unnecessary power consumption. Importantly, this fluctuation of the driving voltage causes noise that may destabilize the power source.